The shift register

• D flip-flop
  • simple memory block with one signal input (D) and one trigger input (CLK)
  • can be easily built from RS flip-flop
    • 
  • several flip-flops in line → shift register
    • 
  • input signal is "shifted" through the line
• Results
  • in Simulink: as expected
  • in Modelica: single input "disappears"
  • strange, because problematic "forbidden" state is ruled out